Verilog Coding for Logic Synthesis

Main
Engineering
Verilog Coding for Logic Synthesis

Verilog Coding for Logic Synthesis

Name: Verilog Coding for Logic Synthesis
ISBN: 9780471429760

Weng Fook Lee

0 / 0

1 comment

এই বইটি আপনার কতটা পছন্দ?

ফাইলের মান কিরকম?

মান নির্ণয়ের জন্য বইটি ডাউনলোড করুন

ডাউনলোড করা ফাইলগুলির মান কিরকম?

Appropriate for both students and practicing engineers, this book outlines the syntax of the Verilog hardware description language for designing application-specific integrated circuit (ASIC) chips, and describes the common practices and coding style used when coding for synthesis. The second half of the book applies Verilog coding to the design of a programmable timer and a programmable logic block for peripheral interface. Topics include comments, Verilog data types, primitives, clock generation, Verilog operators, and the state machine.

ক্যাটাগোরিগুলো:

Engineering

সাল:

2003

প্রকাশক:

Wiley-Interscience

ভাষা:

english

পৃষ্ঠা:

334

ISBN 10:

0471429767